Driver needs updating to supported shared irq lines
The National Bureau of Standards DYSEAC (1954) was the first to use interrupts for I/O.
The IBM 704 was the first to use interrupts for debugging, with a "transfer trap", which could invoke a special routine when a branch instruction was encountered.
The processor responds by suspending its current activities, saving its state, and executing a function called an interrupt handler (or an interrupt service routine, ISR) to deal with the event.
This interruption is temporary, and, after the interrupt handler finishes, unless handling the interrupt has emitted a fatal error, the processor resumes normal activities.
In some cases, such as the x86 architecture, disabling and enabling interrupts on the processor itself act as a memory barrier; however, it may actually be slower.
An interrupt that leaves the machine in a well-defined state is called a precise interrupt.
Software interrupt instructions can function similarly to subroutine calls and are used for a variety of purposes, such as to request services from device drivers, like interrupts sent to and from a disk controller to request reading or writing of data to and from the disk. The number of hardware interrupts is limited by the number of interrupt request (IRQ) lines to the processor, but there may be hundreds of different software interrupts.
This makes it possible to know which hardware device caused which interrupts.If implemented in hardware as a distinct component, an interrupt controller circuit such as the IBM PC's Programmable Interrupt Controller (PIC) may be connected between the interrupting device and the processor's interrupt pin to multiplex several sources of interrupt onto the one or two CPU lines typically available.If implemented as part of the memory controller, interrupts are mapped into the system's memory address space.Such an interrupt has four properties: An interrupt that does not meet these requirements is called an imprecise interrupt.The phenomenon where the overall system performance is severely hindered by excessive amounts of processing time spent handling interrupts is called an interrupt storm.
The MIT Lincoln Laboratory TX-2 system (1957) was the first to provide multiple levels of priority interrupts.